Edouard Bugnion - The IX Operating System: Combining Low Latency, High Throughput and Efficiency in a Protected Dataplane

14:00
Jeudi
1
Déc
2016
Organisé par : 
L’équipe "Keynotes" du LIG
Intervenant : 
Edouard Bugnion, EPFL

Information détaillée : 

Edouard Bugnion joined EPFL as a Professor in 2012, where his focus is on datacenter systems (http://dcsl.epfl.ch/dcsl). His areas of interest include operating systems, datacenter infrastructure (systems and networking), and computer architecture. 

Before joining EPFL, Edouard spent 18 years in the US, where he studied at Stanford and co-founded two startups: VMware and Nuova Systems (acquired by Cisco). At VMware from 1998 until 2005, he played many roles including CTO. At Nuova/Cisco from 2005 until 2011, he helped build the core engineering team and became the VP/CTO of Cisco’s Server, Access, and Virtualization Technology Group, a group that brought to market Cisco’s Unified Computing System (UCS) platform for virtualized datacenters. 

Together with his colleagues, he received the ACM Software System Award for VMware 1.0 in 2009. His paper Disco: Running Commodity Operating Systems on Scalable Multiprocessors" received a Best Paper Award at SOSP '97 and was entered into the ACM SIGOPS Hall of Fame Award in 2008. At EPFL, he received the OSDI 2014 Best Paper Award for his work on the IX dataplane operating system

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Résumé : 


    The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and μs-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. This talks presents IX, a dataplane operating system that provides high I/O performance and high resource efficiency while maintaining the protection and isolation benefits of existing kernels.  

    The IX Operating System project is the result of a joint collaboration between EPFL and Stanford.

    IX uses hardware virtualization to separate management and scheduling functions of the kernel (control plane) from network processing (dataplane). The dataplane architecture builds upon a native, zero-copy API and optimizes for both bandwidth and latency by dedicating hardware threads and networking queues to dataplane instances, processing bounded batches of packets to completion, and by eliminating coherence traffic and multi-core synchronization. The control plane dynamically adjusts core allocations and voltage/frequency settings to meet service-level objectives.

    In the talk, I will show how IX can outperform Linux significantly in terms of throughput, latency and efficiency, e.g., it improves the throughput of a widely deployed, key-value store by up to 7.0× and reduces tail latency by more than 2.1×. With three varying load patterns, the control plane saves 42%–53% of processor energy, and it allows background jobs to run at 28%–40% of their standalone throughput.

    Based on publications at OSDI ’14 (Best Paper Award) and SoCC ’15.