Processing In Memory in DRAM
Mercredi 4 Mars 2020
The memory bottleneck and the dominant energy cost between server processors and memory can be addressed by putting computing capability into the DRAM itself. UPMEM designed and implemented the first Processing In Memory (PIM) architecture and 32-bit processor suitable for scalable, efficient, programmable DRAM integration. UPMEM realized a 4Gb DRAM circuit comprising 8 instances of this processor, on an unchanged DRAM process. These circuits are assembled onto standard DIMM memory modules, enabling harmless integration into standard servers. In a server, thousands of C programmable GP processors with unprecedented data bandwidth are available to data-intensive applications. A LLVM/CLANG based Software Development Kit allows programmers to write or adapt applications by off-loading the most performance critical parts of their code to these added processors. The resulting PIM solution provides much over one order of magnitude benefits in terms of acceleration, energy consumption and TCO, since hardware and programming costs are very limited.
Mis à jour le 27 décembre 2020