Thursday, October 15, 2026
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Designing, Programming, and Verifying Multi-Host Coherent CXL Memory for Heterogeneous CPUs and GPUs
ABSTRACT:
Modern computing systems are becoming increasingly heterogeneous, combining diverse CPUs (x86, Arm, RISC-V), accelerators (GPUs, FPGAs, TPUs), and memory technologies (DRAM, HBM, PMEM) to meet growing demands for performance, power efficiency, and domain-specific computing. This architectural diversity also complicates inter-device communication, resulting in fragmented interfaces, memory semantics, and non-uniform performance. Emerging coherent interconnects, such as Compute Express Link (CXL), promise to address these challenges by providing a standardized interface for memory access in data centers. In particular, CXL 3.0 introduces support for shared memory across multiple hosts with hardware-enforced cache coherence. However, CXL specifications lack mechanisms to safely integrate heterogeneous architectures with distinct memory consistency models and proprietary coherence protocols. This semantic gap poses fundamental challenges and a significant barrier to the adoption of CXL in modern heterogeneous data centers
In this talk, we will discuss the correct and systematic integration of heterogeneous devices with CXL-based shared memory. First, we will introduce CXL bridges, a new abstraction that reconciles differences in memory semantics and proprietary hardware coherence protocols without requiring disruptive architectural changes to existing devices. We will then present vCXLGen, an end-to-end pipeline for automatically synthesizing and verifying CXL bridges from machine-readable protocol specifications. Building on these mechanisms, we will demonstrate how we can enable GPUs to participate in cache-coherent CXL shared memory, opening new opportunities for heterogeneous computing through fine-grained and low-latency CPU–GPU communication. Finally, we will discuss how automated coherence protocol synthesis can accelerate the exploration of hardware coherence design choices for multi-host deployments.
Together, these establish a foundation for building coherent heterogeneous systems that are composable and verifiable, paving the way for new programming abstractions across the hardware/software boundary, and enabling efficient heterogeneous computing.
BIO:
Anatole is a postdoctoral researcher in the Systems Research Group at the Technical University of Munich (TUM). His research focuses on emerging cloud infrastructures at the intersection of computer systems and architecture. At TUM, he leads the CXL-based systems research group, investigating how hardware coherence mechanisms, memory consistency, programming abstractions, and system software can support efficient heterogeneous computing on CXL-based disaggregated systems. He received his Ph.D. in Computer Science from Institut Polytechnique de Paris, where he developed programming and runtime support for persistent memory in Java through novel persistent off-heap objects.
Date and place
Thursday, October 15 at 15:30
IMAG Building, Salle séminaire 1
Organized by
KraKOS Team
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